MoS Channel-Enhanced High-Density Charge Trap Flash Memory and Machine Learning-Assisted Sensing Methodologies for Memory-Centric Computing Systems.

Journal: Advanced science (Weinheim, Baden-Wurttemberg, Germany)
Published Date:

Abstract

Driven by the shift of artificial intelligence (AI) workloads to edge devices, there is a growing demand for nonvolatile memory solutions that offer high-density, low-power consumption, and reliability. However, well-established 3D NAND Flash using polycrystalline Si (Poly-Si) channel encounters bottlenecks in increasing bit density due to short-channel effects and cell-current limitations. This study investigates molybdenum disulfide (MoS) as an alternative channel material for 3D NAND Flash cells. MoS's low bandgap facilitates hole-injection-based erase, achieving a broader memory window at moderate voltages. Furthermore, adopting a low-k (≈2.2) tunneling layer improves the gate-coupling ratio, reducing program/erase voltages and enhancing reliability, with endurance up to 10 cycles and retention of 10 s. Comprehensive analyses, including thickness-dependent MoS electrical measurements, temperature-dependent conduction studies, and Technology Computer-Aided Design (TCAD) simulations, elucidate the relationship between channel thickness and reliability metrics such as endurance and retention. Furthermore, deep reinforcement learning-driven Berkeley Short-channel IGFET Model (BSIM) parameter calibration enables seamless integration of the MoS model with a fabricated page-buffer chip, allowing circuit-level verification of sensing margins. This methodology can be applicable to new channel materials for next-generation memory devices. These results demonstrate that MoS-based nonvolatile memory effectively meets high-density, low-power, and reliable storage needs, presenting a promising solution for AI-centric edge computing.

Authors

  • Ki Han Kim
    School of Electronic and Electrical Engineering, Kyungpook National University, 80 Daehakro, Bukgu, Daegu, 41566, Republic of Korea.
  • Ju Han Park
    School of Electronic and Electrical Engineering, Kyungpook National University, 80 Daehakro, Bukgu, Daegu, 41566, Republic of Korea.
  • Khang June Lee
    Department of Electronic Materials Engineering, The University of Suwon, Hwaseong, Gyeonggi-do, 18323, Republic of Korea.
  • Ji-Won Seo
    Department of Physical Education, Seoul National University, Seoul, Republic of Korea.
  • Yeong Kwon Kim
    School of Electronic and Electrical Engineering, Kyungpook National University, 80 Daehakro, Bukgu, Daegu, 41566, Republic of Korea.
  • Junhwan Choi
    Department of Chemical and Biomolecular Engineering , Graphene/2D Materials Research Center, KAIST , Daejeon 34141 , Korea.
  • Min-Jae Seo
    School of Advanced Fusion Studies, University of Seoul, Seoulsiripdae-ro 163, Dongdaemun-gu, Seoul, 02504, Republic of Korea.
  • Byung Chul Jang
    School of Electrical Engineering , Graphene/2D Materials Research Center, KAIST , Daejeon 34141 , Korea.

Keywords

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