Interpreting artificial neural network-based modeling of 4 H-SiC mosfets using explainable AI.

Journal: Scientific reports
Published Date: Jan 15, 2026

Abstract

Wide bandgap (WBG) semiconductors such as 4 H-SiC MOSFETs are key enablers for next-generation power electronics due to their superior efficiency and high-temperature capability. However, their electrical performance is strongly affected by process variations, and conventional Technology Computer-Aided Design (TCAD) simulations are computationally demanding and difficult to scale. This work presents a novel explainable machine learning framework that integrates artificial neural networks (ANNs) with explainable artificial intelligence (XAI) to enable accurate and interpretable device modeling. The ANN is trained on comprehensive TCAD-generated datasets covering a broad range of structural and doping parameters, while SHapley Additive exPlanations (SHAP) are employed to quantify the influence of each design parameter on electrical characteristics. The proposed model achieves a Pearson correlation coefficient exceeding 0.99 for on-state current prediction, and SHAP analysis reveals physically consistent trends such as the inverse dependence of drain current on oxide thickness and channel length. This study is among the first to apply XAI for interpreting design-performance correlations in SiC MOSFETs, establishing a transparent and data-driven framework for device understanding and optimization. The methodology can be readily extended to other semiconductor technologies where both modeling accuracy and interpretability are essential.

Authors

  • Yu-Sheng Hsiao
    Institute of Pioneer Semiconductor Innovation, National Yang Ming Chiao Tung University, Hsinchu, Taiwan.
  • Pei-Jie Chang
    Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan.
  • Bang-Ren Chen
    International College of Semiconductor Technology, National Yang Ming Chiao Tung University, Hsinchu, Taiwan.
  • Rushat Rai
    International College of Semiconductor Technology, National Yang Ming Chiao Tung University, Hsinchu, Taiwan.
  • Shivendra Kumar Singh
    International College of Semiconductor Technology, National Yang Ming Chiao Tung University, Hsinchu, Taiwan.
  • Yogesh Singh Chauhan
    Department of Electrical Engineering, Indian Institute of Technology Kanpur, Kanpur, India.
  • Wen-Jay Lee
    National Center for High-performance Computing, Hsinchu, Taiwan (R.O.C.).
  • Nan-Yow Chen
    National Center for High-Performance Computing, Hsinchu, 30010, Taiwan, ROC. [email protected].
  • Tian-Li Wu
    International College of Semiconductor Technology, National Yang Ming Chiao Tung University, Hsinchu, Taiwan. [email protected].

Keywords

No keywords available for this article.

External Resources

Popular Topics
Recent Journals