Oxide-Based Electrolyte-Gated Transistors for Spatiotemporal Information Processing.

Journal: Advanced materials (Deerfield Beach, Fla.)
Published Date:

Abstract

Spiking neural networks (SNNs) sharing large similarity with biological nervous systems are promising to process spatiotemporal information and can provide highly time- and energy-efficient computational paradigms for the Internet-of-Things and edge computing. Nonvolatile electrolyte-gated transistors (EGTs) provide prominent analog switching performance, the most critical feature of synaptic element, and have been recently demonstrated as a promising synaptic device. However, high performance, large-scale EGT arrays, and EGT application for spatiotemporal information processing in an SNN are yet to be demonstrated. Here, an oxide-based EGT employing amorphous Nb O and Li SiO is introduced as the channel and electrolyte gate materials, respectively, and integrated into a 32 × 32 EGT array. The engineered EGTs show a quasi-linear update, good endurance (10 ) and retention, a high switching speed of 100 ns, ultralow readout conductance (<100 nS), and ultralow areal switching energy density (20 fJ µm ). The prominent analog switching performance is leveraged for hardware implementation of an SNN with the capability of spatiotemporal information processing, where spike sequences with different timings are able to be efficiently learned and recognized by the EGT array. Finally, this EGT-based spatiotemporal information processing is deployed to detect moving orientation in a tactile sensing system. These results provide an insight into oxide-based EGT devices for energy-efficient neuromorphic computing to support edge application.

Authors

  • Yue Li
    School of Computer Science and Software Engineering, University of Science and Technology Liaoning, Anshan, China.
  • Jikai Lu
    Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, 100029, China.
  • Dashan Shang
    State Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China.
  • Qi Liu
    National Institute of Traditional Chinese Medicine Constitution and Preventive Medicine, Beijing University of Chinese Medicine, Beijing, China.
  • Shuyu Wu
    Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, 100029, China.
  • Zuheng Wu
    Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics of the Chinese Academy of Sciences, 3 Beitucheng West Road, Beijing, 100029, China.
  • Xumeng Zhang
    Department of Electrical and Computer Engineering, University of Massachusetts, 100 Natural Resources Road, Amherst, Massachusetts, 01003, USA.
  • Jianguo Yang
    Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, 100029, China.
  • Zhongrui Wang
    Department of Electrical and Electronic Engineering, The University of Hong Kong, Hong Kong, China.
  • Hangbing Lv
    Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, 100029, China.
  • Ming Liu
    School of Land Engineering, Chang'an University, Xi'an 710064, China; Xi'an Key Laboratory of Territorial Spatial Information, School of Land Engineering, Chang'an University, Xi'an 710064, China. Electronic address: mingliu@chd.edu.cn.