Neuromorphic intermediate representation: A unified instruction set for interoperable brain-inspired computing.

Journal: Nature communications
PMID:

Abstract

Spiking neural networks and neuromorphic hardware platforms that simulate neuronal dynamics are getting wide attention and are being applied to many relevant problems using Machine Learning. Despite a well-established mathematical foundation for neural dynamics, there exists numerous software and hardware solutions and stacks whose variability makes it difficult to reproduce findings. Here, we establish a common reference frame for computations in digital neuromorphic systems, titled Neuromorphic Intermediate Representation (NIR). NIR defines a set of computational and composable model primitives as hybrid systems combining continuous-time dynamics and discrete events. By abstracting away assumptions around discretization and hardware constraints, NIR faithfully captures the computational model, while bridging differences between the evaluated implementation and the underlying mathematical formalism. NIR supports an unprecedented number of neuromorphic systems, which we demonstrate by reproducing three spiking neural network models of different complexity across 7 neuromorphic simulators and 4 digital hardware platforms. NIR decouples the development of neuromorphic hardware and software, enabling interoperability between platforms and improving accessibility to multiple neuromorphic technologies. We believe that NIR is a key next step in brain-inspired hardware-software co-evolution, enabling research towards the implementation of energy efficient computational principles of nervous systems. NIR is available at neuroir.org.

Authors

  • Jens E Pedersen
    KTH Royal Institute of Technology, Stockholm, Sweden. jeped@kth.se.
  • Steven Abreu
  • Matthias Jobst
    Technische Universität Dresden, Dresden, Germany.
  • Gregor Lenz
    Neurobus, Toulouse, France.
  • Vittorio Fra
    Politecnico di Torino, Turin, Italy.
  • Felix Christian Bauer
    SynSense, Zurich, Switzerland.
  • Dylan Richard Muir
    SynSense, Zurich, Switzerland.
  • Peng Zhou
    School of International Studies, Zhejiang University, Hangzhou, China.
  • Bernhard Vogginger
  • Kade Heckel
    University of Cambridge, Cambridge, UK.
  • Gianvito Urgese
    Politecnico di Torino, Department of Control and Computer Engineering, Corso Duca Degli Abruzzi 24, 10129 Torino, Italy. gianvito.urgese@polito.it.
  • Sadasivan Shankar
    Stanford University, Stanford, CA, USA.
  • Terrence C Stewart
  • Sadique Sheik
    SynSense AG Corporation, Zurich, Switzerland.
  • Jason K Eshraghian